Computer Architecture Midsem Exams (GROUP D only)
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mid-sem exams for a group of 5-10 members
Submission is next week
First copy the two logic design diagrams on your answer sheets.
1. Compute the gate delays to the G output in both cases
2. Which design is faster and why?
3. Can both designs be improved to perform faster and how would you do that?
4. Provide an example if yes.
mid-sem exams for a group of 5-10 members
Submission is next week
First copy the two logic design diagrams on your answer sheets.
1. Compute the gate delays to the G output in both cases
2. Which design is faster and why?
3. Can both designs be improved to perform faster and how would you do that?
4. Provide an example if yes.
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Thank you